Dual-Diode Unified SWIPT for High Data Rates with Adaptive Detection
Due to their low-complexity and energy-efficiency, unified simultaneous wireless information and power transfer (U-SWIPT) receivers are especially suitable for low-power Internet of Things (IoT) applications. Towards accurately modeling practical operating conditions, in this study, we provide a unified transient framework for a dual-diode U-SWIPT that jointly accounts for diode nonlinearity and capacitor-induced memory effects. The proposed model accurately describes the inherent time dependence of the rectifier, highlighting its fundamental impact on both energy harvesting (EH) and information decoding (ID) processes. Based on the provided memory-aware model, we design a low-complexity adaptive detector that learns the nonlinear state transition dynamics and performs decision-directed detection with linear complexity. The proposed detection scheme approaches maximum likelihood sequence detection (MLSD) performance in memory-dominated regimes, while avoiding the exponential search required by classical sequence detection. Overall, these results demonstrate that properly exploiting rectifier memory provides a better tradeoff between data rate and reliability for U-SWIPT receivers.
💡 Research Summary
This paper addresses the practical modeling and detection challenges of unified simultaneous wireless information and power transfer (U‑SWIPT) receivers that are intended for low‑power Internet‑of‑Things (IoT) devices in future 6G networks. While early SWIPT works assumed linear power‑conversion or ignored the memory effects of the rectifier, real rectifiers consist of diodes and storage capacitors whose dynamics create a nonlinear finite‑memory channel. The authors focus on a dual‑diode half‑wave rectifier with two low‑pass capacitors (Cₚ and Cₙ) and develop a comprehensive transient model that captures both diode nonlinearity and capacitor‑induced memory.
Each diode is represented by a piecewise‑linear I‑V characteristic with a turn‑on voltage V_on, an on‑resistance R_on, and an off‑resistance R_off. The combination of the two anti‑parallel diodes yields four instantaneous conduction modes (RR, FR, RF, FF). By applying Kirchhoff’s current law, the authors derive a pair of coupled first‑order ordinary differential equations (ODEs) for the node voltages Vₚ(t) and Vₙ(t) in each mode. Solving the ODEs analytically gives a closed‑form expression consisting of exponential transients (with characteristic roots r₁, r₂) plus sinusoidal steady‑state terms (with gains a, b, d). Continuity of voltage and its derivative at mode transitions is enforced by updating integration constants C₁ and C₂, resulting in a physically consistent piecewise‑integrated simulation (Algorithm 1).
The transient simulation reveals a deterministic state‑transition mapping: the end‑of‑symbol load voltage xₖ = V_L(kTₛ) together with the next symbol amplitude Aₖ₊₁ uniquely determines the next voltage xₖ₊₁ = f(xₖ; Aₖ₊₁). This mapping is nonlinear when the capacitor time constant T₀ is comparable to or larger than the symbol duration Tₛ, i.e., in the “memory‑dominated” regime. In the opposite regime (small capacitors, T₀ ≪ Tₛ) the mapping collapses to nearly constant values, and the channel behaves almost memoryless.
Based on this model, the paper compares three detection strategies. (i) Symbol‑by‑symbol maximum‑likelihood (ML) detection with a fixed threshold is optimal when memory is weak. (ii) Maximum‑likelihood sequence detection (MLSD) is optimal in the memory‑dominated regime but requires exhaustive search over Mᴸ possible sequences, leading to exponential complexity. (iii) The authors propose a Circuit‑Aware Adaptive Detector (CAAD) that leverages the deterministic state transition functions µ_H(x) = f(x; A_H) and µ_L(x) = f(x; A_L). These functions are pre‑computed offline on a uniform grid covering the feasible voltage range and stored in a lookup table. During operation, an initial pilot sequence establishes an estimate of the current state ˆx₀. For each subsequent symbol, CAAD predicts the next voltage for both hypotheses using the current state estimate, compares the received noisy sample yₖ₊₁ = xₖ₊₁ + wₖ₊₁ to the two predictions, and selects the hypothesis with the smaller Euclidean distance. The state estimate is then updated according to the chosen hypothesis. This procedure requires only two function evaluations and one comparison per symbol, yielding linear O(K) complexity regardless of the effective memory length.
Simulation parameters include an 800 MHz carrier, symbol period Tₛ = 4 µs, source resistance Rₛ = 50 Ω, load resistance R_L = 1 kΩ, diode turn‑on voltage V_on = 0.25 V, on‑resistance R_on = 5 Ω, off‑resistance R_off = 10 MΩ, and two capacitor sets: (Cₚ = Cₙ = 2 nF) representing weak memory and (Cₚ = Cₙ = 10 nF) representing strong memory.
Results show that in the weak‑memory case CAAD’s bit‑error‑rate (BER) matches that of the simple ML detector, confirming that the adaptive mechanism does not incur a penalty when memory is negligible. In the strong‑memory case, CAAD’s BER curve almost coincides with that of optimal MLSD, demonstrating that the detector successfully exploits the rectifier’s memory without the exponential search cost. Energy‑harvesting performance is evaluated by averaging the instantaneous power P(t) = v²(t)/R_L over K symbols, where v(t) can be either the positive half‑wave voltage Vₚ(t) or the differential load voltage V_L(t) = Vₚ(t) − Vₙ(t). Using V_L(t) yields higher harvested power, and CAAD maintains this advantage while achieving near‑MLSD BER.
In summary, the contributions are threefold: (1) a unified transient analytical framework for a dual‑diode rectifier that captures both diode nonlinearity and capacitor‑induced memory; (2) a low‑complexity, circuit‑aware adaptive detection algorithm that attains MLSD‑level performance in memory‑dominated regimes with linear computational cost; and (3) a demonstration that exploiting rectifier memory improves the trade‑off between data rate, reliability, and harvested energy. The work opens avenues for extending the approach to multi‑antenna, multi‑user scenarios, hardware prototyping, and robustness against non‑Gaussian interference, as well as integrating machine‑learning based state estimation techniques.
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