Stability studies on subtractively-fabricated CMOS-compatible superconducting transmon qubits

Developing fault-tolerant quantum processors with error correction demands large arrays of physical qubits whose key performance metrics (coherence times, control fidelities) must remain within specifications over both short and long timescales. Here we investigated the temporal stability of subtractively fabricated CMOS-compatible superconducting transmon qubits. During a single cooldown and over a period of 95 hours, we monitored several parameters for 8 qubits, including coherence times $T_1$ and $T_2^*$, which exhibit fluctuations originating primarily from the interaction between two-level system (TLS) defects and the host qubit. We also demonstrate that subtractively-fabricated superconducting quantum devices align with the theoretical predictions that higher mean lifetimes $T_1$ correspond to larger fluctuations. To assess long-term stability, we tracked two representative qubits over 10 cooldown cycles spanning more than one year. We observed an average total downward shift in both qubit transition frequencies of approximately 61 MHz within the thermal cycles considered. In contrast, readout resonator frequencies decreased only marginally. Meanwhile, $T_1$ exhibits fluctuations from cycle to cycle, but maintains a stable baseline value.

💡 Research Summary

The paper presents a comprehensive study of the temporal stability of superconducting transmon qubits fabricated using a CMOS‑compatible subtractive process. The authors first examine eight qubits during a single cooldown lasting 95 hours, measuring longitudinal relaxation time (T₁), effective transverse relaxation time (T₂* from Ramsey experiments), and single‑shot readout metrics (distance between IQ blobs Δm, readout fidelity F, and effective qubit temperature T_eff). The data reveal strongly skewed distributions for T₁ and T₂*: occasional abrupt drops (“drop‑outs”) produce long right‑hand tails. These events are attributed to interactions with two‑level system (TLS) defects that transiently increase energy loss and dephase the qubit. Histograms are fitted with offset Rician functions to extract robust means and standard deviations, mitigating the influence of outliers.

The Ramsey analysis also tracks the qubit transition frequency |f_Ramsey|−Δf over time. Both sudden jumps (telegraphic TLS switching) and slow drifts (diffusive TLS motion) are observed, with magnitudes up to ~15 kHz. Frequency jumps coincide with simultaneous reductions in T₁ and T₂*, consistent with the relation 1/T₂ = 1/(2T₁)+1/T_φ and confirming that TLS affect both energy relaxation and dephasing.

To assess long‑term behavior, two representative qubits (A.1 and B.1) are followed across ten cooldown cycles spanning more than a year. While the readout resonator frequencies remain essentially unchanged, the qubit transition frequencies shift downward by an average of 61 MHz over the thermal cycles, likely due to stress relaxation, oxide thickness changes, or TLS reconfiguration during warm‑up and vacuum breaks. T₁ values fluctuate between cycles but stay centered around a stable baseline, indicating that the underlying loss mechanisms are reproducible after each thermal cycle.

The authors then benchmark their data against published results from lift‑off processes (Dolan bridge and Manhattan techniques). By plotting the standard deviation σ_T₁ versus the mean ⟨T₁⟩ for all datasets, they confirm a universal scaling σ_T₁ = a·⟨T₁⟩^{3/2} with a ≈ 1.22×10⁻² s^{2/3}. This scaling, derived from a model where a single TLS dominates the decay fluctuations, holds for both subtractively fabricated and lift‑off qubits, demonstrating that the CMOS‑compatible process does not introduce additional instability. Moreover, the absolute magnitude of σ_T₁ for the subtractive qubits is comparable to, or better than, that of lift‑off devices.

Key insights include: (1) TLS remain the dominant source of both short‑term (hour‑scale) fluctuations and long‑term (year‑scale) frequency drifts; (2) higher average T₁ correlates with larger relative fluctuations, implying a trade‑off between achieving long lifetimes and maintaining stability; (3) subtractively fabricated CMOS‑compatible qubits meet the same stability standards as traditional lift‑off qubits, validating the process for large‑scale quantum‑processor manufacturing.

The work provides essential experimental evidence for designers of fault‑tolerant quantum processors, where thousands of physical qubits must retain coherence and frequency stability over extended operation periods. It suggests that future improvements should target TLS density reduction (through material purification, surface treatments), incorporation of flux‑tunable designs to mitigate frequency drift, and active TLS control schemes. Overall, the study confirms that CMOS‑compatible subtractive fabrication is a viable pathway toward scalable, stable superconducting quantum hardware.