PSPACE-Completeness of Majority Automata Networks

We study the dynamics of majority automata networks when the vertices are updated according to a block sequential updating scheme. In particular, we show that the complexity of the problem of predicting an eventual state change in some vertex, given an initial configuration, is PSPACE-complete.

💡 Research Summary

The paper investigates the computational complexity of predicting state changes in majority automata networks when vertices are updated according to a block‑sequential scheme. A majority automata network consists of an undirected graph G = (V,E) together with a Boolean function at each vertex that outputs 1 if a strict majority of its neighbors are active, and 0 otherwise. An updating scheme S assigns each vertex an integer label; vertices with the same label are updated simultaneously, and labels define a total preorder that determines the order of block updates. Three families of schemes are considered: synchronous (all vertices share the same label), sequential (all labels are distinct), and block‑sequential (the general case).

The central decision problem, called Bseq‑Majority, asks: given a majority network A, a block‑sequential scheme S, an initial configuration x, and a target vertex v that is initially inactive, does there exist a time step t such that v becomes active? Prior work showed that the problem is polynomial‑time solvable for synchronous and sequential schemes (in fact P‑complete), while for block‑sequential schemes it is NP‑hard, leaving the exact complexity open.

The authors resolve this open question by proving that Bseq‑Majority is PSPACE‑complete. The proof proceeds in two main stages.

1. Simulation of Monotone Boolean Circuits (Lemma 1).
   For any monotone Boolean circuit C (using only AND and OR gates) with n inputs and m outputs, the authors construct a majority network M of size polynomial in |C| together with a sequential updating scheme S′ such that, when the inputs of C are encoded as the states of designated input vertices in M, a single application of the global transition function F_{S′} produces on the designated output vertices exactly the values computed by C. The construction replaces each gate by a small “gadget” of majority vertices whose degree is bounded by 2d − 1, where d is the maximum fan‑in of the original circuit. This shows that majority networks can faithfully simulate one step of any monotone circuit.

2. Generation of Long Limit Cycles with Small Blocks (Lemma 2).
   The authors exhibit a constant‑degree graph H (degree 3) containing three distinguished vertices v₀, v₁, v₂ and four auxiliary vertices. With a block‑sequential scheme that updates two vertices at a time, the system implements a 3‑state counter: starting from any initial configuration, the state of v_s at time t equals s = t mod 3. This demonstrates that even with blocks of size two, majority networks can produce cycles of arbitrary length (by concatenating such counters), contradicting any hope of a simple monotone operator that would bound the period.

Combining these lemmas, the authors reduce the Iterated Monotone Circuit problem—given a monotone circuit C, an input x, and an output index i, does there exist t such that the i‑th output of C⁽ᵗ⁾(x) is 1?—to Bseq‑Majority. The iterated circuit problem is known to be PSPACE‑complete because it is equivalent to the linear‑bounded Turing machine acceptance problem. The reduction preserves polynomial size and uses only block‑sequential updates; therefore Bseq‑Majority is PSPACE‑hard. Since the prediction problem can be solved by exploring the configuration space using at most exponential time but only polynomial space (by keeping the current configuration and a counter), Bseq‑Majority lies in PSPACE, establishing PSPACE‑completeness.

The paper further strengthens the result by showing that the PSPACE‑completeness holds even when the block‑sequential scheme is restricted to:

• Constant‑size blocks (e.g., blocks of size two), or
• A constant number of blocks (independent of the number of vertices).

Thus, limiting parallelism does not reduce the inherent difficulty of prediction.

Additional decision problems are examined. The authors prove that variants such as “does any vertex ever change?”, “does a vertex change after an unbounded number of steps?”, and “do all vertices change simultaneously at some step?” remain PSPACE‑complete, even when the initial configuration is not part of the input.

Finally, the authors extend their techniques to a generalized majority rule where a vertex becomes active if at least a fixed proportion p ∈ (0,1) of its neighbors are active (the p‑majority rule). By adapting the circuit‑simulation gadgets, they show that the corresponding prediction problems under block‑sequential updates are also PSPACE‑complete.

In summary, the paper establishes that the prediction problem for majority automata networks under block‑sequential updating is PSPACE‑complete, even under severe restrictions on the parallelism of updates. This result delineates a sharp contrast with synchronous and sequential schemes (which are in P) and demonstrates that block‑sequential dynamics can encode arbitrarily complex computations, making prediction fundamentally intractable in the worst case. The work bridges dynamical systems on graphs with classical complexity theory and suggests that any efficient prediction algorithm for such networks would imply a breakthrough in our understanding of PSPACE.